Thesis project for my Master of Science in Electronics and ICT Engineering Technology at KULeuven, Campus De Nayer.
Copyright 2019 Dries Kennes. All rights reserved.
Documents: The thesis document and the interim report.
Thesis: The source code for the thesis documents.
ISCAS89: The ISCAS'89 benchmark set and related materials.
VHDL: All custom VHDL code.
Results: All output data from our tests.
Python: The main software source code.
All code in this repository not otherwise marked is released under the terms of the MIT license. See LICENSE.txt for the full terms of the this license.